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    Digital Full Adders & Subtractors using NAND Gates

    Item ID :2001
    • Objective :To construct & verify truth tables of digital half adder, half subtractor, full adder and full subtractor using NAND Gates.
    • Instrument comprises of DC Regulated Power Supply 5VDC/150mA for logic inputs, three SPDT switches provided for selecting logic 1 & logic 0 , three NOT gates for providing compliments of the logic inputs, two Red LED output indicator, symbolic diagram printed for five NAND gates of tri-input, three NAND gates of dual input & one quad input NAND gates & their respective ICs placed on the front panel & connections brought out at sockets.